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ADM1063ACPZ(RevC) Просмотр технического описания (PDF) - Analog Devices

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ADM1063ACPZ Datasheet PDF : 32 Pages
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ADM1063
Parameter
SERIAL BUS TIMING4
Clock Frequency, fSCLK
Bus Free Time, tBUF
Start Setup Time, tSU;STA
Stop Setup Time, tSU;STO
Start Hold Time, tHD;STA
SCL Low Time, tLOW
SCL High Time, tHIGH
SCL, SDA Rise Time, tR
SCL, SDA Fall Time, tF
Data Setup Time, tSU;DAT
Data Hold Time, tHD;DAT
Input Low Current, IIL
SEQUENCING ENGINE TIMING
State Change Time
Min
Typ Max Unit Test Conditions/Comments
400 kHz
1.3
μs
0.6
μs
0.6
μs
0.6
μs
1.3
μs
0.6
μs
300 ns
300 ns
100
ns
5
ns
1
μA
VIN = 0 V
10
μs
1 At least one of the VH, VPx pins must be ≥3.0 V to maintain the device supply on VDDCAP.
2 All temperature sensor measurements are taken with round-robin loop enabled and at least one other voltage input being measured.
3 Specification is not production tested but is supported by characterization data at initial product release.
4 Timing specifications are guaranteed by design and supported by characterization data.
Rev. C | Page 6 of 32

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