AD650 Просмотр технического описания (PDF) - Analog Devices
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AD650 Datasheet PDF : 20 Pages
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Data Sheet
CIRCUIT OPERATION
UNIPOLAR CONFIGURATION
The AD650 is a charge balance voltage-to-frequency converter.
In the connection diagram shown in Figure 4, or the block
diagram of Figure 5, the input signal is converted into an
equivalent current by the input resistance RIN. This current is
exactly balanced by an internal feedback current delivered in
short, timed bursts from the switched 1 mA internal current
source. These bursts of current can be thought of as precisely
defined packets of charge. The required number of charge
packets, each producing one pulse of the output transistor,
depends upon the amplitude of the input signal. Because the
number of charge packets delivered per unit time is dependent
on the input signal amplitude, a linear voltage-to-frequency
transformation is accomplished. The frequency output is
furnished via an open collector transistor.
A more rigorous analysis demonstrates how the charge balance
voltage-to-frequency conversion takes place.
A block diagram of the device arranged as a V-to-F converter is
shown in Figure 5. The unit is comprised of an input integrator,
a current source and steering switch, a comparator, and a one
shot. When the output of the one shot is low, the current
steering switch S1 diverts all the current to the output of the op
amp; this is called the integration period. When the one shot
has been triggered and its output is high, the switch S1 diverts
all the current to the summing junction of the op amp; this is
called the reset period. The two different states are shown in
Figure 6 and Figure 7 along with the various branch currents. It
should be noted that the output current from the op amp is the
same for either state, thus minimizing transients.
CINT
RIN
VIN
R3 R1
–15V
0.1µF
COS
AD650
1
OP
2
AMP
INPUT 14
OFFSET
TRIM 13
20kΩ
250kΩ
3
12
+15V
4
–VS
S1
11
1mA –0.6V
0.1µF
1µF
ANALOG
GROUND
5
OUT
IN –VS
10
VLOGIC
6
FREQ
ONE
SHOT
OUT
7
9
COMP
DIGITAL
R2
GROUND
8
FOUT
Figure 4. Connection Diagram for V/F Conversion, Positive Input Voltage
AD650
INTEGRATOR CINT
COS
IIN
RIN
+
VIN
–
COMPARATOR
FREQUENCY
OUTPUT
ONE
SHOT
S1
–0.6V
AD650
1mA ± 20%
tOS
t
–VS
Figure 5. Block Diagram
IIN
+
VIN RIN
– 1mA
CINT
1mA – IIN
S1
1mA
–VS
Figure 6. Reset Mode
IIN
+
VIN RIN
–
CINT IIN
1mA – IIN
1mA
S1
1mA
–VS
Figure 7. Integrate Mode
RESET
INTEGRATE
∆V
t
–0.6
tOS
T1
Figure 8. Voltage Across CINT
Rev. E | Page 7 of 20
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