VPC3201C Просмотр технического описания (PDF) - Micronas
Номер в каталоге
Компоненты Описание
Список матч
VPC3201C Datasheet PDF : 48 Pages
| |||
PRELIMINARY DATA SHEET
VPC 3205C, VPC 3215C
1.3. VPC Applications
Fig. 1–2 depicts several VPC applications. Since the
VPC functions as a video front-end, it must be comple-
mented with additional functionality to form a complete
TV set.
The DDP 33x0 contains the video back-end with video
postprocessing (contrast, peaking, DTI,...), H/V-deflec-
tion, RGB insertion (SCART, Text, PIP,...) and tube
control (cutoff, white drive, beam current limiter). It
generates a beam scan velocity modulation output
from the digital YCrCb and RGB signals. Note that this
signal is not generated from the external analog RGB
inputs.
The CIP 3250A provides a high quality analog RGB
interface with character insertion capability. This allows
appropriate processing of external sources, such as
MPEG2 set-top boxes in transparent (4:2:2) quality.
Furthermore, it translates RGB/Fastblank signals to
the common digital video bus and makes those signals
available for 100 Hz upconversion or double scan pro-
cessing. In some European countries (Italy), this fea-
ture is mandatory.
The IP indicates memory based image processing,
such as scan rate conversion, vertical processing
(Zoom), or PAL+ reconstruction.
Examples:
– Europe: 15 kHz/50 Hz → 32 kHz/100 Hz interlaced
– US: 15 kHz/60 Hz → 32 kHz/60 Hz non-interlaced
Note that the VPC supports memory based applica-
tions through line-locked clocks, syncs, and data. CIP
may run either with the native DIGIT3000 clock but
also with a line-locked clock system.
CVBS
a)
RGB
b)
CVBS
VPC
320x
VPC
321x
IP
CVBS
c)
VPC
321x
CIP
3250A
IP
RGB
Fig. 1–2: VPC 32xx applications
a) 15 kHz application Europe
b) double scan application (US, Japan)
c) 100 Hz application (Europe) with RGB inputs
DDP
3300A
DDP
3310B
DDP
3310B
RGB
H/V
Defl.
RGB
H/V
Defl.
RGB
H/V
Defl.
Micronas
5
Share Link: 