VPC3211C Просмотр технического описания (PDF) - Micronas

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VPC3211C

VPC3205C, VPC3215C Video Processor Family

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PRELIMINARY DATA SHEET

VPC 3205C, VPC 3215C

Table 3–2: Control Registers of the Fast Processor

– default values are initialized at reset

– * indicates: register is initialized according to the current standard when SDT register is changed.

FP Sub- Function

address

Default

Name

Standard Selection

h’20

Standard select:

bit[2:0]

standard

0 PAL B,G,H,I

1 NTSC M

2 SECAM

3 NTSC44

4 PAL M

5 PAL N

6 PAL 60

7 NTSC COMB

(50 Hz)

(60 Hz)

(50 Hz)

(60 Hz)

(60 Hz)

(50 Hz)

(60 Hz)

(60 Hz)

4.433618

3.579545

4.286

4.433618

3.575611

3.582056

4.433618

3.579545

bit[3]

0/1 MOD standard modifier

PAL modified to simple PAL

NTSC modified to compensated NTSC

SECAM modified to monochrome 625

NTSCC modified to monochrome 525

bit[4] 0/1 PAL+ mode off/on

bit[5] 0/1 4-H COMB mode

bit[6]

0/1 S-VHS mode:

The S-VHS/COMB bits allow the following modes:

00 composite input signal

01 comb filter active

10 S-VHS input signal

11 CVBS mode (composite input signal, no luma notch)

Option bits allow to suppress parts of the initialization; this can be

used for color standard search:

bit[7]

bit[8]

bit[9]

bit[10]

no hpll setup

no vertical setup

no acc setup

4-H comb filter setup only

bit[11]

status bit, normally write 0. After the FP has switched to a

new standard, this bit is set to 1 to indicate operation

complete. Standard is automatically initialized when the

insel register is written.

SDT

0

PAL

NTSC

SECAM

NTSC44

PALM

PALN

PAL60

NTSCC

0 SDTMOD

0 PALPLUS

0 COMB

0 SVHS

0 SDTOPT

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