LTC1060 Просмотр технического описания (PDF) - Linear Technology
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LTC1060 Datasheet PDF : 20 Pages
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LTC1060
COMM E TS ON THE M ODES OF OPERATIO
RH1
RL1
R11
VIN
R41
R31
R21
– 5V
V+ = – 5V
LTC1060
1
LPA
2
BPA
3
HPA
4
INVA
5
S1A
6
SA/B
7 VA+
8 VD+
9
LSh
10
CLKA
20
LPB
19
BPB
18
NB
17
INVB
16
S1B
15
AGND
VA– 14
VD– 13
12
50/100
11
CLKB
R42
R52
R32
R22
V– = – 5V
T2L OR CMOS
CLOCK IN
R11 = 60k
R41 = 28.84k
R52 = 5k
R32 = 455.75k
RESISTOR VALUES
R21 = 5k
R31 = 54.75k
RH1 = 5k
R62 = 1.59k
RL1 = 19.3k
R22 = 60k
R42 = 503.85k
R62
VOUT
LTC1060 • CM04
Figure 22. Combining Mode 3 with Mode 2b to Create a 4th
Order BR Elliptic Filter with 1dB Ripple and a Ratio of 0dB to
Stop Bandwidth Equal to 9/1.
fCLK
f0
= 200
1
; fCLK ≤ 1MHz
0
–10
–20
–30
– 40
– 50
– 60
0.7
0.8
0.9
f0 = 1.0
1.1
1.2
1.3
INPUT FREQUENCY NORMALIZED TO FILTER CENTER FREQUENCY
TLC1060 • CMO05
Figure 23. Amplitude Response of the Notch Filter of Figure 22
LTC1060 OFFSETS
Switched capacitor integrators generally exhibit higher
input offsets than discrete R, C integrators. These offsets
are mainly due to the charge injection of the CMOS
switches into the integrating capacitors and they are
temperature independent.
The internal op amp offsets also add to the overall offset
budget and they are typically a couple of millivolts. Be-
cause of this, the DC output offsets of switched capacitor
filters are usually higher than the offsets of discrete active
filters.
(18) (16)
(19)
(20)
35
2
1
(17) + VOS1 –
4
–
– VOS2
+
++
Σ
––
–
VOS3
+ ––
+
+
TLC1060 • LO01
15
Figure 24. Equivalent Input Offsets of 1/2 LTC1060 Filter
Building Block
18
Figure 24 shows half of an LTC1060 filter building block
with its equivalent input offsets VOS1, VOS2, VOS3. All three
are 100% tested for both sides of the LTC1060. VOS2 is
generally the larger offset. When the SA/B, Pin 6, of the
LTC1060 is shorted to the negative supply (i.e., mode 3),
the value of the VOS2 decreases. Additionally, with SA/B
low, a 20% to 30% noise reduction is observed. Mode 1
can still be achieved, if desired, by shorting the S1 pin to
the lowpass output (Figure 25).
R3
R2
R1
VIN
4–
(17)
+
3
N
(18)
5
S1A
(16)
2
BP
(19)
1
LP
(20)
+–
Σ∫
∫
–
SA/B
6 15
1/2 LTC1060
TLC1060 • LO02
V–
Figure 25. Mode 1(LN): Same Operation as Mode 1 but Lower
VOS2 Offset and Lower Noise
1060fb
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