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MAX1715EEI(2000) Просмотр технического описания (PDF) - Maxim Integrated

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MAX1715EEI Datasheet PDF : 28 Pages
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Ultra-High Efficiency, Dual Step-Down
Controller for Notebook Computers
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, 4A components from Table 1, VCC = VDD = +5V, SKIP = AGND, V+ = 15V, TA = 0°C to +85°C, unless otherwise
noted.) (Note 1)
PARAMETER
CONDITIONS
MIN TYP MAX UNITS
Minimum Off-Time
(Note 3)
400
500
ns
Quiescent Battery Current (V+)
25
70
µA
Quiescent Supply Current
(VCC + VDD)
FB1 and FB2 forced above the regulation point
1100 1600 µA
Shutdown Supply Current
(VCC + VDD)
ON1 = ON2 = 0
<1
5
µA
Shutdown Supply Current (V+) ON1 = ON2 = 0
<1
5
µA
Reference Voltage
No external REF load
1.98
2
2.02
V
Reference Load Regulation
REF Sink Current
IREF = 0 to 50µA
REF in regulation
2
0.01
V
10
µA
REF Fault Lockout Voltage
Falling edge, hysteresis = 40mV
1.6
V
Overvoltage Trip Threshold
With respect to error comparator threshold
8.5
10.5
13
%
Overvoltage Fault Propagation
Delay
FB_ forced 2% above trip threshold
1.5
µs
Output Undervoltage Threshold With respect to error comparator threshold
60
70
80
%
Output Undervoltage Lockout
Time
From ON_ signal going high
10
20
30
ms
Current-Limit Threshold
(Positive Direction, Fixed)
PGND - LX_, ILIM = VCC
75
100
125
mV
Current-Limit Threshold
(Positive Direction, Adjusted)
PGND - LX_, ILIM resistor = 100k
PGND - LX_, ILIM resistor = 400k
40
50
60
mV
160
200
240
Current-Limit Threshold
(Negative Direction)
PGND - LX_, TA = +25°C, ILIM = VCC
-145 -120
-95
mV
Current-Limit Threshold, Zero
Crossing
PGND - LX_, SKIP = AGND
-5
3
10
mV
Thermal Shutdown Threshold
VCC Undervoltage Lockout
Threshold
DH Gate Driver On-Resistance
DL Gate Driver On-Resistance
(pull-up)
DL Gate Driver On-Resistance
(pull-down)
Hysteresis = 10°C
Rising edge, hysteresis = 20mV, PWM disabled below
this level
BST - LX forced to 5V
DL, high state
DL, low state
150
°C
4.1
4.4
V
1.5
5
1.5
5
0.6
2.5
DH Gate Driver Source/Sink
Current
DH forced to 2.5V, BST_ - LX_ forced to 5V
1
A
DL Gate Driver Source Current
DL Gate Driver Sink Current
Dead Time
Logic Input High Voltage
Logic Input Low Voltage
DL forced to 2.5V
DL forced to 2.5V
DL rising
DH rising
ON_, SKIP
ON_, SKIP
1
A
3
A
35
ns
26
2.4
V
0.8
V
_______________________________________________________________________________________ 3

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