ST16C580
level. In this case the 580 FIFO may hold more charac-
ters than the programmed trigger level. Following the
removal of a data byte, the user should recheck LSR bit-
0 for additional characters. A Receive Time Out will not
occur if the receive FIFO is empty. The time out counter
is reset at the center of each stop bit received or each
time the receive holding register (RHR) is read (see
Figure 10, Receive Time-out Interrupt). The actual time
out value is T (Time out length in bits) = 4 X P
(Programmed word length) + 12. To convert the time out
value to a character value, the user has to consider the
complete word length, including data information
length, start bit, parity bit, and the size of stop bit, i.e.,
1X, 1.5X, or 2X bit times.
Example -A: If the user programs a word length of 7,
with no parity and one stop bit, the time out will be:
T = 4 X 7( programmed word length) +12 = 40 bit times.
The character time will be equal to 40 / 9 = 4.4
characters, or as shown in the fully worked out ex-
ample: T = [(programmed word length = 7) + (stop bit
= 1) + (start bit = 1) = 9]. 40 (bit times divided by 9) =
4.4 characters.
Example -B: If the user programs the word length = 7,
with parity and one stop bit, the time out will be:
T = 4 X 7(programmed word length) + 12 = 40 bit times.
Character time = 40 / 10 [ (programmed word length
= 7) + (parity = 1) + (stop bit = 1) + (start bit = 1) = 4
characters.
Programmable Baud Rate Generator
The 580 supports high speed modem technologies
that have increased input data rates by employing
data compression schemes. For example a 33.6Kbps
modem that employs data compression may require a
115.2Kbps input data rate. A 128.0Kbps ISDN modem
that supports data compression may need an input
data rate of 460.8Kbps. The 580 can support a stan-
dard data rate of 921.6Kbps.
Single baud rate generator is provided for the trans-
mitter and receiver, allowing independent TX/RX
channel control. The programmable Baud Rate Gen-
erator is capable of accepting an input clock up to 24
MHz, as required for supporting a 1.5Mbps data rate.
The 580 can be configured for internal or external clock
operation. For internal clock oscillator operation, an
industry standard microprocessor crystal (parallel reso-
nant/ 22-33 pF load) is connected externally between
the XTAL1 and XTAL2 pins, with an external 1 M