G768D Просмотр технического описания (PDF) - Global Mixed-mode Technology Inc
Номер в каталоге
Компоненты Описание
Список матч
G768D
Global Mixed-mode Technology Inc
G768D Datasheet PDF : 16 Pages
| |||
Global Mixed-mode Technology Inc.
G768D
The Alert Response can activate several different slave
devices simultaneously, similar to the SMBus General
Call. If more than one slave attempts to respond, bus
arbitration rules apply, and the device with the lower
address code wins. The losing device does not generate
an acknowledge and continues to hold the ALERT line
low until serviced (implies that the host interrupt input is
level sensitive). Successful reading of the alert re-
sponse address clears the interrupt latch.
Command Byte Functions
The 8-bit command byte register (Table 4) is the mas-
ter index that points to the various other registers
within the G768D. The register's POR state is 0000
0000, so that a Receive Byte transmission (a protocol
that lacks the command byte) that occurs immediately
after POR returns the current local temperature data.
The one-shot command immediately forces a new
conversion cycle to begin. In software standby mode
( RUN /STOP bit = high), a new conversion is begun,
after which the device returns to standby mode. If a
conversion is in progress when a one-shot command
is received in auto-convert mode (RUN/STOP bit = low)
between conversions, a new conversion begins, the
conversion rate timer is reset, and the next automatic
conversion takes place after a full delay elapses.
Configuration Byte Functions
The configuration byte register contents are listed in
table 5. Bit 7(MASK) is used to mask ALERT interrupt.
Bit 6 ( RUN /STOP) is to put the device in software
standby mode. Setting bit 5 (DET_FAN) with logic 1
can activate the detection of fan failure. Logic 1 in bit 4
(EN_TH_SHUT) makes thermal shutdown function
valid and logic 0 disables this function and keep
TH_SHUT pin low. Bit 3~0 forms thermal shutdown
fault queue. The number of faults these bits decided
are listed in table 6.
Thermal Status Byte Functions
The thermal status byte register (02h) (Table 6) indi-
cates which (if any) temperature thresholds have been
exceeded. This byte also indicates whether or not the
ADC is converting and whether there is an open circuit
in the remote diode DXPx-DXN path. After POR, the
normal state of all the flag bits is zero, assuming none
of the alarm conditions are present. The status byte is
cleared by any successful read of the status, unless
the fault persists. Note that the ALERT interrupt latch
is not automatically cleared when the status flag bit is
cleared.
When reading the status byte, you must check for in-
ternal bus collisions caused by asynchronous ADC
timing, or else disable the ADC prior to reading the
status byte (via the RUN /STOP bit in the configura-
tion byte). In one-shot mode, read the status byte only
after the conversion is complete, which is 150ms max
after the one-shot conversion is commanded.
Table 5. Configuration-Byte Bit Assignments
BIT
NAME POR STATE
FUNCTION
7 (MSB)
MASK
0
Masks all ALERT interrupts when high.
6
RUN / STOP
0
Standby mode control bit. If high, the device immediately stops converting and en-
ters standby mode. If low, the device converts in either one-shot or timer mode.
5
DET_FAN
0
Validation of the fan failure detection. If high, activated. If low, disable.
4
EN_TH_SHUT
1
Validation of the fault queue function of thermal shutdown.
3-0 FQ_TH_SHUT
0010b
Fault Queue. Number of faults necessary to detect before setting TH_SHUT output
to avoid false tripping due to noise.
Table 6. Number of Faults assigned by FQ_TH_SHUT
FQ_TH_SHUT
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
Number of Faults
1
2
3(Power-up default)
4
5
6
7
8
FQ_TH_SHUT
1000b
1001b
1010b
1011b
1100b
1101b
1110b
1111b
Number of Faults
9
10
11
12
13
14
15
16
Ver: 1.2
Apr 03, 2002
TEL: 886-3-5788833
http://www.gmt.com.tw
12
Share Link: