AD9483 Просмотр технического описания (PDF) - Analog Devices
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AD9483 Datasheet PDF : 28 Pages
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AD9483
Pin Number
1, 6, 7, 10, 20, 30, 40, 50,
60, 70, 73, 77, 78, 80, 81,
95, 96, 100
2
3
4
5
8
9
11, 21, 31, 41, 51, 61, 71
79, 82, 83, 93, 94, 98, 99
12–19
22–29
32–39
42–49
52–59
62–69
72
74
Mnemonic
GND
ENCODE
ENCODE
DS
DS
DCO
DCO
VDD
VCC
DBB7–DBB0
DBA7–DBA0
DGB7–DGB0
DGA7–DGA0
DRB7–DRB0
DRA7–DRA0
NC
OMS
75
I/P
76
PD
84
R AIN
85
R AIN
86
R REF IN
87
G AIN
88
G AIN
89
G REF IN
90
B AIN
91
B AIN
92
B REF IN
97
REF OUT
PIN FUNCTION DESCRIPTIONS
Function
Ground
Encode Clock for ADC (ADC Samples on Rising Edge of ENCODE)
Encode Clock Complement (ADC Samples on Falling Edge of ENCODE)
Data Sync Aligns Output Channels in Dual-Channel Mode
Data Sync Complement
Data Clock Output. Clock Output at Channel A Data Rate
Data Clock Output Complement
Output Power Supply. Nominally 3.3 V
Converter Power Supply. Nominally 5.0 V
Digital Outputs of Converter “B,” Channel B. DBB7 is the MSB
Digital Outputs of Converter “B,” Channel A. DBA7 is the MSB
Digital Outputs of Converter “G,” Channel B. DGB7 is the MSB
Digital Outputs of Converter “G,” Channel A. DGA7 is the MSB
Digital Outputs of Converter “R,” Channel B. DRB7 is the MSB
Digital Outputs of Converter “R,” Channel A. DRA7 is the MSB
No Connect
Selects Single Channel or Dual Channel Output Mode, (HIGH = Single,
LOW = Demuxed)
Selects Interleaved or Parallel Output Mode, (HIGH = Interleaved, LOW = Parallel)
Power-Down and Three-State Select (HIGH = Power-Down)
Analog Input Complement for Converter “R”
Analog Input True for Converter “R”
Reference Input for Converter “R” (2.5 V Typical, ± 10%)
Analog Input Complement for Converter “G”
Analog Input True for Converter “G”
Reference Input for Converter “G” (2.5 V Typical, ± 10%)
Analog Input Complement for Converter “B”
Analog Input True for Converter “B”
Reference Input for Converter “B” (2.5 V Typical, ± 10%)
Internal Reference Output (2.5 V Typical); Bypass with 0.01 µF to Ground
REV. C
–5–
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