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74HC4075D

Triple 3-input OR gate

NXP Semiconductors. 

Philips Semiconductors

Triple 3-input OR gate

Product specification

74HC/HCT4075

FEATURES

• Output capability: standard

• ICC category: SSI

GENERAL DESCRIPTION

The 74HC/HCT4075 are high-speed Si-gate CMOS

devices and are pin compatible with the “4075” of the

“4000B” series. They are specified in compliance with

JEDEC standard no. 7A.

The 74HC/HCT4075 provide the 3-input OR function.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25 °C; tr = tf = 6 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/ tPLH

CI

CPD

propagation delay nA, nB, nC to nY

input capacitance

CL = 15 pF; VCC = 5 V

power dissipation capacitance per gate notes 1 and 2

Notes

1. CPD is used to determine the dynamic power dissipation (PD in µW):

PD = CPD × VCC2 × fi + ∑ (CL × VCC2 × fo) where:

fi = input frequency in MHz

fo = output frequency in MHz

∑ (CL × VCC2 × fo) = sum of outputs

CL = output load capacitance in pF

VCC = supply voltage in V

2. For HC the condition is VI = GND to VCC

For HCT the condition is VI = GND to VCC − 1.5 V

TYPICAL

HC

8

3.5

28

HCT

10

3.5

32

UNIT

ns

pF

pF

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

December 1990

2

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