UAA2068AHL Просмотр технического описания (PDF) - Philips Electronics
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UAA2068AHL Datasheet PDF : 20 Pages
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Philips Semiconductors
Transmit chain and synthesizer with
integrated VCO for DECT
Product specification
UAA2068AHL
Table 1 Mode control; note 1
BLOCK STATUS
VCO_ON
VCO, buffer, doubler, RF switch, TX preamplifier and LO buffer
0
powered-down
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
1
LO buffer powered-down
Nominal RF signal at TX output
VCO, buffer, doubler, RF switch and TX preamplifier powered-up
1
LO buffer powered-down
No RF signal output
VCO, buffer, doubler, RF switch and LO buffer powered-up
1
TX preamplifier powered-down
Nominal RF signal at LO buffer output
VCO, buffer, doubler, RF switch and LO buffer powered-up
1
TX preamplifier powered-down
No RF signal output
To power-down PLL blocks; notes 2 and 3
1
To power-up PLL blocks; notes 2 and 3
1
All blocks in power-down state; notes 2 and 3
0
New PLL division ratio is loaded and the PLL blocks are powered-up on
1
the rising edge of S_EN; note 3
R_OFF
X
1
1
0
0
X
X
X
X
Notes
1. X = don’t care.
2. PLL blocks are the main divider, reference divider, phase detector and charge pump.
3. A reference signal is needed on pin XTAL for correct operation.
T_EN
X
1
0
0
1
X
X
X
X
S_EN
X
X
X
X
X
0
1
0
0 to 1
Table 2 Bit allocation; note 1
FIRST IN
REGISTER BIT ALLOCATION
LAST IN
DATA FIELD
b15 b14 b13 b12 b11 b10 b9 b8 b7 b6(2) b5 b4 b3 b2 b1
b0
0
00100001
main divider programming(3)
Notes
1. For normal operation, b15 to b0 need to be programmed.
2. Bit b6 is the MSB of the main divider coefficient.
3. The main divider ratio is equal to 2176 plus the programmed value (see Table 3).
1999 Jun 04
8
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