FX980L7 Просмотр технического описания (PDF) - CML Microsystems Plc

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FX980L7

TETRA Baseband Processor

CML Microsystems Plc 

CML Semiconductor Products

TETRA Baseband Processor FX980

1.0 Features

D/980/3 November 1997

Advance Information

• RRC Filters for both Tx and Rx

• π/4 DQPSK Modulation

• 2x 13-Bit Resolution Sigma Delta D-A

• 2x 16-Bit Resolution Sigma Delta A-D

• 4 x10-Bit D-A and 4 Input 10-Bit A-D

• Transmit Output Power Control

• Low Power 3.0 - 5.5Volt Operation

• Effective Power down Modes

1.1 Brief Description

This device is intended to act as an interface between the analogue and digital sections of a Digital Radio

System, and performs many critical and DSP-intensive functions. The chip is designed with the necessary

capability to meet the requirements for use in both mobile and base station applications in Terrestrial Trunked

Radio (TETRA) systems.

The transmit path comprises all the circuitry required to convert digital data into suitably filtered analogue I

and Q signals for subsequent up-conversion and transmission. This includes digital control of the output

amplitudes, digital control of the output offsets and fully programmable digital filters: default coefficients

provide the RRC response required for TETRA.

The receive section accepts differential analogue I and Q signals at baseband and converts these into a

suitably filtered digital form for further processing and data extraction. A facility is provided for digital offset

correction and the digital filters are fully programmable with default coefficients providing the RRC response

required for TETRA.

Auxiliary DAC and ADC functions are included for the control and measurement of the RF section of the radio

system. This may include AFC, AGC, RSSI, or may be used as part of the control system for a Cartesian

Loop.

© 1997 Consumer Microcircuits Limited

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