CS62180B-IL Просмотр технического описания (PDF) - Cirrus Logic

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CS62180B-IL

T1 Framer

Cirrus Logic 

CS62180A

CS62180B

SWITCHING CHARACTERISTICS - SERIAL PORT

(TA = -40 to 85 °C; VDD = 5V ± 10%; VIH = 2.0V; VIL = 0.8V; Maximum input rise & fall times of 10 ns)

Parameter

Symbol Min

Typ

Max

SDI to SCLK Setup

tDC

50

-

-

SCLK to SDI Hold

tCDH1

50

-

-

SDI to SCLK Falling Edge (Applies to CS62180A)

tCD

50

-

-

SCLK Low Time

tCL

250

-

-

SCLK High Time

tCH

250

-

-

SCLK Rise & Fall Times

(Note 9) tR, tF

-

-

500

CS to SCLK Set up

tCC

50

-

-

SCLK to CS Hold

tCCH

50

-

-

CS Inactive Time

tCWH

250

-

-

SCLK to SDO Valid

(Note 9) tCDV

-

-

200

SCLK Rising to MSB of SDO Hold

(Note 10) tCDH2

25

-

-

CS to SDO High-Z

tCDZ

-

-

75

Notes: 9. Output load capacitance = 100 pF.

10. SDO goes High-Z after rising edge of SCLK for MSB, regardless of the state of CS.

Units

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

ns

CS

tCC tCH

t CCH

t CWH

SCLK

t DC

t CDH1

SDI

LSB

t CD

t CL

tCDH1

LSB

MSB

Control Byte

Data Byte

Serial Port Write Timing

11. For the CS62180A only, data bytes must be valid across low clock periods to prevent transients in

operating modes. tCD is not a requirement for the CS62180B. In the CS62180B data is latched on the

rising edge of SCLK.

12. Shaded regions indicate don’t care states.

CS

SCLK

t CDZ

SDO

t CDV

High-Z

t CDH2

MSB High-Z

Serial Port Read Timing

13. Serial port write must precede a port read to provide address information.

14. SDO will go High-Z: 1) if CS returns high at anytime; 2) after outputing MSB.

DS225PP1

3

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