CS62180B Просмотр технического описания (PDF) - Cirrus Logic

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CS62180B

T1 Framer

Cirrus Logic 

CS62180A

CS62180B

7 (MSB) 6

5

4

3

2

1

0 (LSB)

TTR1 CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1

TTR2 CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9

TTR3 CH24 CH23 CH22 CH21 CH20 CH19 CH18

"0" = Normal "1" = Corresponding DS0 Channel is Transparent. (Not signaling or B7 Insertion.)

CH17

Figure11. Transmit Transparent Registers (TTR1 - TTR3)

TIR1

TIR2

TIR3

7 (MSB) 6

5

4

3

2

1

0 (LSB)

CH8 CH7 CH6 CH5 CH4 CH3 CH2 CH1

CH16 CH15 CH14 CH13 CH12 CH11 CH10 CH9

CH24 CH23 CH22 CH21 CH20 CH19 CH18

"0" = Normal "1" = Corresponding DS0 Channel is Replaced with Idle Code. (See TCR.3)

CH17

Figure 12. Transmit Idle Registers (TIR1 - TIR3)

Transmit Transparent Registers (TTR)

Transmit Idle Registers (TIR)

The Transmit Transparent Registers allow indi-

vidual DS0 channels to be programmed clear,

disabling robbed bit signaling and B7 zero sup-

pression for that channel (if selected, B8ZS is

unaffected by transparent channels). There are 3

TTR registers: TTR1, TTR2, and TTR3. Each bit

in the TTR registers corresponds to a DS0 chan-

nel: TTR1.0 = channel 1, TTR1.7 = channel 8,

TTR2.7 = channel 16, etc. A channel is pro-

grammed clear by setting the bit which

corresponds to that channel in the appropriate

TTR register. See Figure 11.

By setting the appropriate bits in the Transmit

Idle Registers, individual DS0 channels can be

replaced with the idle code selected via TCR.3

(see above). If the idle channel is not also pro-

grammed clear (via TTR1 - TTR3), the code

may be corrupted during signaling frames if

robbed bit signaling is enabled (TCR.4 = 1).

There are 3 TIR registers: TIR1, TIR2, and

TIR3. Each bit in the TIR registers corresponds

to a DS0 channel: TIR1.0 = channel 1, TIR1.7 =

channel 8, TIR2.7 = channel 16, etc. A channel

is programmed idle by setting the bit which cor-

responds to that channel in the appropriate TIR

register. See Figure 12.

Transmission Insertion Hierarchy

Figures 13a - 13c give an overview of the deci-

sion hierarchy which determines the final

composition of the output stream. It shows the

various control options as inputs into decision

branches of the flow chart, and the order in

which the various optional signals are muxed

into the final data stream.

18

DS225PP1

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