CL-PS7500FE Просмотр технического описания (PDF) - Cirrus Logic
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CL-PS7500FE Datasheet PDF : 251 Pages
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CL-PS7500FE
System-on-a-Chip for Internet Appliance
2.1 CL-PS7500FE Pin Descriptions (cont.)
Name
IOP[7:0]
ID
OD[1:0]
SETCS
nINT1
INT2
nINT3
nINT4
INT5
nINT6
INT7
nINT8
INT9
nEVENT1
nEVENT2
Type
TOD
TOD
TOD
IC
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
IT
Drive
Strength
Description
1 I/O PORT: This is the 8-bit-wide I/O port. Each bit is directly control-
lable through an CL-PS7500FE register, and can be used as an
interrupt source if required.
1 ID: This pin activates a system ID chip. It is forced low during the
power-on reset sequence.
1 OPEN DRAIN 1:0: These are the two open-drain pins, which (unlike
the IOP[7:0] bus) cannot be used to generate interrupts, but can be
used as general-purpose I/O pins (for example to communicate with
a realtime clock chip).
This signal selects between two address decoding options for the
three main I/O chip selects. It affects the outputs nEASCS, nMSCS,
and nSIOCS2.
This is a falling-edge-triggered interrupt. The nINT1 value can be
read directly in the IOCR I/O control register.
This is a rising-edge-triggered interrupt pin that can generate an
IRQ interrupt.
This is an active-low interrupt that can generate an IRQ interrupt.
This is an active-low interrupt that can generate an IRQ interrupt.
This is an active-high interrupt that can generate either an IRQ or a
FIQ interrupt, depending on the status of the relevant mask register
bits.
This is an active-low interrupt that can generate either an IRQ or a
FIQ interrupt, depending on the programming of the mask registers.
This is an active-high interrupt that can generate an IRQ interrupt.
This is an active-low interrupt that can generate either a FIQ or an
IRQ interrupt.
This is an active-high interrupt that can only generate a FIQ (highest
priority) interrupt.
This is the active-low asynchronous event pin 1. A falling edge ter-
minates the STOP or SUSPEND power-saving modes.
This is the active-low asynchronous event pin 2. A falling edge ter-
minates the STOP or SUSPEND power-saving modes.
June 1997
ADVANCE DATA BOOK v2.0
19
PIN DESCRIPTIONS
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