WT8046N24P1 Просмотр технического описания (PDF) - Weltrend Semiconductor

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WT8046N24P1

Synchronous Signal Discriminator with Power Saving Detector and Test Pattern for Green Monitor

Weltrend Semiconductor 

WT8046

Synchronous Signal Discriminator with Power Saving

Detector and Test Pattern for Green Monitor



The way WT8046 implements VESA DPMS

As shown on Table 2, WT8046 use PM1 to represent Stand-by State, PM2 as Suspend State

and PM3 as OFF State. When H_SYNC / V_SYNC signals transition from ON State to any one

of the three power saving states, WT8046 will delay 5.9 seconds to meet the VESA DPMS

requirement: the minimum 5 seconds delay to avoid unintentionally entering a power saving

state during display resolution and timing mode changes. If during this delay time period,

H_SYN and V_SYN signals return to ON State, then all three power management pins (PM1,

PM2 and PM3) will remain ON state. If power management state of H_SYNC and V_SYNC

prolong for more than 5.9 seconds, then these three power management pins will change to the

corresponding states. While changing from any power saving state back to ON State will take

about 0.368 second for H_SYNC / VSYNC pulse checking. And transition between any power

saving state will be done immediately.

Table 2: The truth table of Power Saving Detector

MODE

Hsin

Vsin

PM1

PM2

PM3

ON

Pulses

Pulses

1

1

1

STAND_BY

No Pulses

Pulses

0

1

1

SUSPEND

Pulses

No Pulses

0

0

1

OFF

No Pulses

No Pulses

0

0

0

OVERRIDE

No Pulses

No Pulses

1

1

1

Manually PWR ON



Weltrend Semiconductor, Inc.

2F., No. 24, Industry E. 9th Rd.

Science-Based Industrial Park

Hsin-Chu, Taiwan, R.O.C.

Tel: 886-35-780241

Fax: 886-35-770419

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