Z87000 Просмотр технического описания (PDF) - Zilog
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Z87000 Datasheet PDF : 50 Pages
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Z87000/Z87L00
Spread Spectrum Controllers
INPUT/OUTPUT PIN CHARACTERISTICS
All digital pins (all pins except VDD, AVDD, GND, AGND,
VREF, RX, TX, RSSI and PWLV) have an internal capaci-
tance of 5 pF.
Zilog
The RX analog input pin has an input capacitance of 10
pF.
The RSSI analog input pin has an input capacitance of 10
pF.
AC ELECTRICAL CHARACTERISTICS
Clocks, Reset and RF Interface
Table 10. Clocks, Reset and RF Interface
No.
Symbol
Parameter
Min
1 TpC
MCLK input clock period (1)
61
2 TwC
MCLK input clock pulse width
20
3 TrC, TfC
MCLK input clock rise/fall time
4 TrCC, TfCC
CLKOUT output clock rise/fall time
2
5 TrCO, TfCO
CODCLK output clock rise/fall time
2
6 TwR
RESETB input low width
18
7 TrRF, TfRF
RF output controls rise/fall time (2)
2
Notes:
1. MCLK is 16.384 MHz ± 25 ppm
2. RF Controls are RFTX, RFRX, RXON, RFEON, SYLE.
Max
Units
61
ns
40
ns
15
ns
6
ns
6
ns
TpC
6
ns
1-14
PRELIMINARY
DS96WRL0501
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