HM5212325FBPC Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HM5212325FBPC

128M LVTTL interface SDRAM 100 MHz 1-Mword ×32-bit ×4-bank PC/100 SDRAM

Hitachi -> Renesas Electronics 

Revision Record

Rev. Date

Contents of Modification

0.0 Oct. 25, 1999 Initial issue

0.1 Jan. 7, 2000 Correct errors of pin arrangement

Correct errors of DC Characteristics

ILI: −4/4 to −2/2 µA

ILO: −6/6 to −3/3 µA

Package dimension

Change tolerance value

0.2 Feb. 29, 2000 Capacitance

CI1 min: 5 pF to 4 pF

CI2 min: 5 pF to 4 pF

CI3 min: 2.5 pF to 2 pF

CO min: 3 pF to 2 pF

1.0 May. 12 ,2000 Package dimension

Change of seated height

HM5212325FBPC-B60

Drawn by

S. Hatano

Y. Kagaya

Approved by

S. Hatano

S. Hatano

M. Nishimura I. Hihara

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