V53C16125HT60 Просмотр технического описания (PDF) - Mosel Vitelic Corporation

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V53C16125HT60

HIGH PERFORMANCE 128K X 16 BIT FAST PAGE MODE CMOS DYNAMIC RAM

Mosel Vitelic Corporation  

MOSEL VITELIC

V53C16125H

Truth Table

Function

Standby

Read: Word

Read: Lower Byte

RAS LCAS UCAS WE OE

H

H

H

X

X

L

L

L

H

L

L

L

H

H

L

Read: Upper Byte

L

H

L

H

L

Write: Word (Early-Write)

L

Write: Lower Byte (Early)

L

L

L

L

X

L

H

L

X

Read: Upper Byte (Early)

L

H

L

L

X

Read-Write

Page-Mode Read

Page-Mode Write

Page-Mode Read-Write

Hidden Refresh Read

RAS-Only Refresh

CBR Refresh

L

L

L

H®L

L

H®L

L

H®L

L®H®L L

L

H

H®L

L

L

H®L

H®L

H®L

L

H

L

H®L

H

L

H®L

H

X

X

L®H

L

X

L®H

L

X

X

Notes:

1. Byte Write cycles LCAS or UCAS active.

2. Byte Read cycles LCAS or UCAS active.

3. Only one of the two CAS must be active (LCAS or UCAS).

ADDRESS

X

ROW/COL

ROW/COL

ROW/COL

ROW/COL

ROW/COL

ROW/COL

ROW/COL

COL

COL

COL

ROW/COL

ROW

X

I/O

High-Z

Data Out

Lower Byte, Data-Out

Upper Byte, High-Z

Lower Byte, High-Z

Upper Byte, Data-Out

Data-In

Lower Byte, Data-In

Upper Byte, High-Z

Lower Byte, High-Z

Upper Byte, Data-In

Data-Out, Data-In

Data-Out

Data-In

Data-Out, Data-In

Data-Out

High-Z

High-Z

Notes

1,2

2

2

1,2

2

3

V53C16125H Rev. 1.6 September 1998

8

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