CD40104BMS Просмотр технического описания (PDF) - Intersil

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CD40104BMS

CMOS 4-Bit Bidirectional Universal Shift Register

Intersil 

CD40104BMS, CD40194BMS

Logic Diagrams

SHIFT

RIGHT

*

INPUT 2

D0 *

3

VDD

B

p

n

B

D

p

n

D

G

p

n

G

E

p

n

E

CL

CL

p

p

n

n

CL

CL

CL

p

n

CL

Q0

OUTPUT *

ENABLE 1

CLOCK *

11

S0 *

9

S1 *

10

D1 *

4

OE

CL

CL

D2 *

5

D

D

G

G

B

B

E

E

D3 *

6

SHIFT LEFT *

INPUT 7

VDD

VDD

VDD

B

p

n

B

D

p

n

D

G

p

n

G

E

p

n

E

B

p

n

B

D

p

n

D

G

p

n

G

E

p

n

E

B

p

n

B

D

p

n

D

G

p

n

G

E

p

n

E

OE

Q0

CL

p

n

CL

VDD

Q0

15

VSS

CL Q1

CL

Q1

OE

Q1

14

CL Q2

CL

Q2

OE

Q2

13

VDD

VSS

* ALL INPUTS ARE PROTECTED

BY CMOS PROTECTION

NETWORK

CL Q3

CL

Q3

OE

Q3

12

CONTROL TRUTH TABLE

MODE SELECT OUTPUT

CLOCK* S0

S1 ENABLE

ACTION

0

0

1

Reset

1

0

1

Shift Right (Q0 toward Q3)

0

1

1

Shift Left (Q3 toward Q0)

1

1

1

Parallel Load

X

X

X

0

Operations occur as shown above,

but outputs assume high impedance

X = Don’t Care 1 = High level 0 = Low level * Level change

FIGURE 1. CD40104BMS

7-1313

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