HCTS299D Просмотр технического описания (PDF) - Intersil

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HCTS299D

Radiation Hardened 8-Bit Universal Shift Register; Three-State

Intersil 

Specifications HCTS299MS

AC Timing Diagrams and Load Circuit

INPUT LEVEL

CP

I/On, Q0 OR Q7

VS VS

TW

TPHL

VS

VS

TPLH

VS

FIGURE 1. CLOCK PRE-REQUISITE AND PROPAGATION

DELAYS

INPUT LEVEL

MR

CP

Q0 TO Q7

VS

TW

t PHL

VS

VS

TREC

VS

FIGURE 2. MASTER RESET PRE-REQUISITE AND PROPAGA-

TION DELAYS

INPUT

LEVEL

DS0, DS7

OR I/On

CP

VS

TSU(L)

VS

VS

TH(L)

TSU(L)

VS

TH(H)

VOH

VS

VS

VOL

FIGURE 3. DATA PRE-REQUISITE TIMES

TTLH

20%

80% 80%

OUTPUT

TTHL

20%

FIGURE 4. OUTPUT TRANSITION TIME

AC VOLTAGE LEVELS

PARAMETER

HCTS

VCC

4.50

VIH

3.00

VS

1.30

VIL

0

GND

0

UNITS

V

V

V

V

V

DUT

CL

TEST

POINT

RL

CL = 50pF

RL = 500Ω

FIGURE 5. AC LOAD CIRCUIT

Spec Number 518640

633

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