PEF24902(2001) Просмотр технического описания (PDF) - Infineon Technologies

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PEF24902
(Rev.:2001)

Quad ISDN Echocancellation Circuit Analogue Front End

Infineon Technologies 

PEB 24902

PEF 24902

Overview

1

Overview

The PEB 24902 Quad IEC AFE (Quadruple ISDN Echocancellation Circuit Analogue

Front End) is part of a 2B1Q or 4B3T ISDN U-transceiver chip set. Up to four lines can

be accessed simultaneously by the Quad IEC AFE. The Quad IEC AFE is optimized to

work in conjunction with the PEB 24901 Quad IEC DFE-T and the PEB 24911 Quad IEC

DFE-Q. An integrated PLL synchronizes the 15.36 MHz Master clock onto the 8 kHz or

2048 kHz PTT Clock. This specification describes the functionality for 2B1Q and 4B3T

interfaces.

All technical descriptions are valid for PEF 24902 Quad IEC AFE, too. The only

difference between PEB 24902 and PEF 24902 is the operating ambient temperature,

which is extended for PEF 24902, see Chapter 7.2.

Data Sheet

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2001-01-23

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