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74VHCT86A Просмотр технического описания (PDF) - STMicroelectronics

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74VHCT86A
ST-Microelectronics
STMicroelectronics ST-Microelectronics
74VHCT86A Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
74VHCT86A
QUAD EXCLUSIVE OR GATE
s HIGH SPEED: tPD = 5.5ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2 µA (MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN.), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 86
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.8V (MAX.)
DESCRIPTION
The 74VHCT86A is an advanced high-speed
CMOS QUAD EXCLUSIVE OR GATE fabricated
with sub-micron silicon gate and double-layer
metal wiring C2MOS technology.
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
SOP
TSSOP
74VHCT86AM
T&R
74VHCT86AMTR
74VHCT86ATTR
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
June 2001
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