ST49C107A Просмотр технического описания (PDF) - Exar Corporation
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ST49C107A Datasheet PDF : 8 Pages
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ST49C107A-04
Preliminary
PIN CONFIGURATION
A1
1
14
A0
A2
2
13
1XCLK
A3
3
12
VCC
AGND
4
11
2XCLK
DGND
5
10
OE2
PD*
6
9
OE1
XTAL1
7
8
XTAL2
14 Lead SOIC (Jedec, 0.150”)
PIN DESCRIPTION
Symbol
A1
A2
A3
AGND
DGND
PD
XTAL1
XTAL2
OE1
OE2
2XCLK
VCC
1XCLK
A0
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Type
I
I
I
O
O
I
I
O
I
I
O
I
O
I
Description
Frequency Select Address Input 21.
Frequency Select Address Input 31.
Frequency Select Address Input 41.
Analog Ground.
Digital Ground.
Power-down (Active Low). Shuts off chip when low1.
Crystal Or External Clock Input. A crystal can be connected to this pin and XTAL2 pin to
generate internal phase locked loop reference clock. For external 14.318 MHz clock, XTAL2
is left open or used as buffered clock output.
Crystal Output.
1X-CLOCK Output Enable (Active High). 1X-CLOCK output is three stated when this pin is
low1.
2X-CLOCK Output Enable (Active High). 2X-CLOCK output is three stated when this pin is
low1.
Programmed Output Clock.
Positive Supply Voltage. Single +5 volts.
2X-CLOCK Divide-by-two Output.
Frequency Select Address Input 11.
Notes
1Have internal pull-up resistors on inputs.
Rev. P2.00
2
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