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CXG1053FN Просмотр технического описания (PDF) - Sony Semiconductor

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CXG1053FN Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
CXG1053FN
2. Antenna Switch Receiver Block + Low Noise Amplifier, Down Conversion Mixer (Ta = 25°C)
SW/LNA block: POUT, PIM3 vs. PIN
20
VDD = 3V, RF1 = 1.9000GHz,
RF2 = 1.9006GHz
0 VCTL1 = 0V, VCTL2 = 3V
POUT
–20
–40
–60
PIM3
–80
Input IP3
–100
–50 –40 –30 –20 –10
0
PIN – RF input power [dBm]
MIX block: POUT, PIM3 vs. PIN
20
VDD = 3V, RF1 = 1.9000GHz,
RF2 = 1.9006GHz
0 LO = 1.66GHz/–12dBm
POUT
–20
–40
–60
PIM3
–80
Input IP3
–100
–40
–30
–20
–10
0
10
PIN – RF input power [dBm]
MIX block: Gc, NF vs. PLO
10.0
12
9.5
11
Gc
9.0
10
8.5
9
NF
8.0
8
7.5
7.0
–25
7
VDD = 3V, RF = 1.90GHz/small signal,
LO = 1.66GHz
6
–20
–15 –10
–5
0
PLO – LO input power [dBm]
MIX block: Input IP3, PLK vs. PLO
2.0
–25
1.5
–30
Input IP3
1.0
–35
0.5
0.0
–0.5
–1.0
–25
–40
PLK
–45
VDD = 3V, RF = 1.90GHz/–25dBm,
LO = 1.66GHz
–50
VCTL1 = 0V, VCTL2 = 3V
LNA output pin and MIX input pin is
directly connected with the cable. –55
–20
–15 –10
–5
0
PLO – LO input power [dBm]
–6–

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