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HD74HC680 Просмотр технического описания (PDF) - Hitachi -> Renesas Electronics

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HD74HC680
Hitachi
Hitachi -> Renesas Electronics Hitachi
HD74HC680 Datasheet PDF : 10 Pages
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HD74HC680
12-bit Address Comparator
Description
The HD74HC680 address comparator simplifies addressing of memory boards and/or other peripheral
devices. The four P inputs are normally hard wired with a preprogrammed address. An internal decoder
determines what input information applied to the 12 A inputs must be low or high to cause a low state at the
output (Y). For example, a positive-logic bit combination of 0111 (decimal 7) at the P input determines
that inputs A1 through A7 must be low and that inputs A8 through A12 must be high to cause the output to go
low. Equality of the address applied at the A inputs to the preprogrammed address is indicated by the
output being low.
The HD74HC680 features a transparent latch and a latch enable input (C). When C is high, the device is in
the transparent mode. When C is low, the previous logical state of Y is latched.
Features
High Speed Operation
High Output Current: Fanout of 10 LSTTL Loads
Wide Operating Voltage: VCC = 2 to 6 V
Low Input Current: 1 µA max
Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C)

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