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W6692 Просмотр технического описания (PDF) - Winbond

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W6692 Datasheet PDF : 104 Pages
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Preliminary Data Sheet
7. FUNCTIONAL DESCRIPTIONS
W6692 PCI ISDN S/T-Controller
7.1 Main Block Functions
The functional block diagram of W6692 is shown in Fig.6.1. The main function blocks are :
- Layer 1 function according to ITU-T I.430
- Serial Interface Bus (SIB)
- B channel switching
- GCI bus interface
- PCM port and internal switching (x 2)
- D channel HDLC controller
- B channel HDLC controllers (x 2)
- PCI/microprocessor interface circuit
- Serial EEPROM interface for PCI Configuration purpose
- Peripheral control
The layer 1 function includes:
- S/T bus transmitter/receiver
- Timing recovery using Digital Phase Locked Loop (DPLL) circuit
- Layer 1 activation/deactivation
- D channel access control
- Frame alignment
- Multi-frame synchronization
- Test functions
The serial interface bus performs the multiplexing/demultiplexing of D and 2B channels.
The B channel switching determines the connection between layer1/GCI, layer 2 and PCM.
The GCI circuit is used to connect a U transceiver (slave mode) or other slave GCI device (master mode).
The PCM port provides two 64 kbps clear channels to connect to PCM codec chips and switching between two PCM ports.
The D channel HDLC controller performs the LAPD (Link Access Procedure on the D channel) protocol according to ITU-T
I.441/Q.921 recommendation.
There are two independent B channel HDLC controllers. They can be used to support HDLC-like protocols such as Internet PPP.
Two B channels are also handled by one HDLC controller to support OCN application.
The PCI interface circuit implements PCI specification revision 2.2 slave mode function. When PCI circuit is disabled, a 8-bit
microprocessor interface is used to control the chip.
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Publication Release Date: Sep 30, 1999
Revision 0.9

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