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MM74C165N Просмотр технического описания (PDF) - Fairchild Semiconductor

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MM74C165N
Fairchild
Fairchild Semiconductor Fairchild
MM74C165N Datasheet PDF : 6 Pages
1 2 3 4 5 6
AC Electrical Characteristics (Note 2)
TA = 25°C, CL = 50 pF, unless otherwise noted
Symbol
Parameter
Conditions
Min
Typ
Max
Units
tpd0, tpd1 Propagation Delay Time to a Logical 0or VCC = 5V
Logical 1from Clock or Load to Q or Q VCC = 10V
tpd0, tpd1 Propagation Delay Time to a Logical 0or VCC = 5V
Logical 1from H to Q or Q
VCC = 10V
tS
Clock Inhibit Set-up Time
VCC = 5V
VCC = 10V
tS
Serial Input Set-up Time
VCC = 5V
VCC = 10V
tH
Serial Input Hold Time
VCC = 5V
VCC = 10V
tS
Parallel Input Set-Up Time
VCC = 5V
VCC = 10V
tH
Parallel Input Hold Time
VCC = 5V
VCC = 10V
tW
Minimum Clock Pulse Width
VCC = 5V
VCC = 10V
tW
Minimum Load Pulse Width
VCC = 5V
VCC = 10V
fMAX
Maximum Clock Frequency
VCC = 5V
VCC = 10V
tr, tf
Maximum Clock Rise and Fall Time
VCC = 5V
VCC = 10V
CIN
Input Capacitance
(Note 3)
CPD
Power Dissipation Capacitance
(Note 4)
Note 2: AC Parameters are guaranteed by DC correlated testing.
200
400
ns
80
200
200
400
ns
80
200
150
75
ns
60
30
50
25
ns
30
15
50
0
ns
30
0
150
75
ns
60
30
50
0
ns
30
0
70
200
ns
30
100
85
180
ns
30
90
2.5
6
5
12
MHz
10
µs
5
5
pF
65
pF
Note 3: Capacitance is guaranteed by periodic testing.
Note 4: CPD determines the no load AC power consumption of any CMOS device. For complete explanation see Family Characteristics application note
AN-90.
Switching Time Waveform
Note A: The remaining six data and the serial input are LOW.
Note B: Prior to test, HIGH level data is loaded into the P7 input.
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