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LTC1657

Parallel 16-Bit Rail-to-Rail Micropower DAC

Linear Technology 

LTC1657/LTC1657L

APPLICATIO S I FOR ATIO

Rail-to-Rail Output Considerations

In any rail-to-rail DAC, the output swing is limited to

voltages within the supply range.

If the DAC offset is negative, the output for the lowest

codes limits at 0V as shown in Figure 1b.

Similarly, limiting can occur near full scale when the REF

pin is tied to VCC/2. If VREF = VCC/2 and the DAC full-scale

error (FSE) is positive, the output for the highest codes

limits at VCC as shown in Figure 1c. No full-scale limiting

can occur if VREF is less than (VCC – FSE)/2.

Offset and linearity are defined and tested over the region

of the DAC transfer function where no output limiting can

occur.

VCC

OUTPUT

VOLTAGE

VREF = VCC/2

POSITIVE

FSE

VCC

VREF = VCC /2

OUTPUT

VOLTAGE

INPUT CODE

(c)

OUTPUT

VOLTAGE

0

32768

65535

INPUT CODE

(a)

0V

NEGATIVE

OFFSET

INPUT CODE

(b)

1657 F02

Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve. (a) Overall Transfer Function (b) Effect of Negative

Offset for Codes Near Zero Scale (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC/2

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