CS61880-IB Просмотр технического описания (PDF) - Cirrus Logic
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CS61880-IB Datasheet PDF : 70 Pages
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2. PIN OUT - 160-BALL FBGA PACKAGE
CS61880
14 13 12 11 10 9
8
7
6
5
4
3
2
1
A
RCLK RPOS RNEG TVCC TRING TGND
RTIP
RTIP
TGND TRING TVCC RNEG RPOS RCLK
A
4
4
4
4
4
4
4
7
7
7
7
7
7
7
B
TCLK
4
TPOS
4
TNEG
4
TVCC
4
TTIP
4
TGND
4
RRING
4
RRING
7
TGND
7
TTIP
7
TVCC
7
TNEG
7
TPOS
7
TCLK
7
B
C
RCLK
5
RPOS
5
RNEG
5
TVCC
5
TRING
5
TGND
5
RTIP
5
RTIP
6
TGND
6
TRING
6
TVCC
6
RNEG
6
RPOS
6
RCLK
6
C
D
TCLK
5
TPOS
5
TNEG
5
TVCC
5
TTIP
5
TGND
5
RRING
5
RRING
6
TGND
6
TTIP
6
TVCC
6
TNEG
6
TPOS
6
TCLK
6
D
E
TXOE CLKE
LOS
5
LOS
4
LOS
7
LOS
6
MODE MCLK
E
F
TCK
TDO
TDI
TMS
A4
A3
A2
A1
F
G
VCCIO CBLSEL TRST GNDIO
H
RV1+
REF
INTL
RGND
1
CS61880
160 FBGA
(Bottom View)
GNDIO
A0
LOOP
0
VCCIO
G
RGND
0
LOOP
1
LOOP
2
RV0+
H
J
WR
RD
ALE
CS
K
RDY
INT
LOS
2
LOS
3
LOOP LOOP LOOP LOOP
J
3
4
5
6
LOS
0
LOS
1
MUX
LOOP
7
K
L
TCLK
2
TPOS
2
TNEG
2
TVCC
2
TTIP
2
TGND
2
RRING
2
RRING
1
TGND
1
TTIP
1
TVCC
1
TNEG
1
TPOS
1
TCLK
1
L
M
RCLK
2
RPOS
2
RNEG
2
TVCC
2
TRING
2
TGND
2
RTIP
2
RTIP
1
TGND
1
TRING
1
TVCC
1
RNEG
1
RPOS
1
RCLK
1
M
N
TCLK
3
TPOS
3
TNEG
3
TVCC
3
TTIP
3
TGND
3
RRING
3
RRING
0
TGND
0
TTIP
0
TVCC
0
TNEG
0
TPOS
0
TCLK
0
N
P
RCLK
3
RPOS
3
RNEG
3
TVCC
3
TRING
3
TGND
3
RTIP
3
RTIP
0
TGND
0
TRING
0
TVCC
0
RNEG
0
RPOS
0
RCLK
0
P
14 13 12 11 10 9
8
7
6
5
4
3
2
1
Figure 2. CS61880 160-Ball FBGA Package Pin Outs
8
DS450PP2
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