SL74HC240D Просмотр технического описания (PDF) - System Logic Semiconductor

Номер в каталоге

Компоненты Описание

Список матч

SL74HC240D

Octal 3-State Inverting Buffer/Line Driver/Line Receiver High-Performance Silicon-Gate CMOS

System Logic Semiconductor 

SL74HC240

AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=6.0 ns)

Symbol

Parameter

VCC

Guaranteed Limit

V 25 °C to ≤85°C ≤125°C Unit

-55°C

tPLH, tPHL Maximum Propagation Delay, A to YA or B to YB 2.0

80

100

120

ns

(Figures 1 and 3)

4.5 16

20

24

6.0 14

17

20

tPLZ, tPHZ Maximum Propagation Delay, Output Enable to

2.0 110

140

165

ns

YA or YB (Figures 2 and 4)

4.5 22

28

33

6.0 19

24

28

tPZH, tPZL Maximum Propagation Delay, Output Enable to

2.0 110

140

165

ns

YA or YB (Figures 2 and 4)

4.5 22

28

33

6.0 19

24

28

tTLH, tTHL Maximum Output Transition Time, Any Output

2.0 60

75

90

ns

(Figures 1 and 3)

4.5 12

15

18

6.0 10

13

15

CIN

Maximum Input Capacitance

COUT Maximum Three-State Output Capacitance

(Output in High-Impedance State)

-

10

10

10

pF

-

15

15

15

pF

Power Dissipation Capacitance (Per Transceiver

Channel)

CPD Used to determine the no-load dynamic power

consumption:

PD=CPDVCC2f+ICCVCC

Typical @25°C,VCC=5.0 V

32

pF

Figure 1. Switching Waveforms

Figure 2. Switching Waveforms

SLS

System Logic

Semiconductor

Share Link: