IDT72511 Просмотр технического описания (PDF) - Integrated Device Technology

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IDT72511

PARALLEL BIDIRECTIONAL FIFO 512 x 18 & 1024 x 18

Integrated Device Technology 

IDT72511/IDT72521

BIDIRECTIONAL FIRST-IN FIRST-OUT MEMORY

RS

WB, RB

(or R/WB, DSB)

RER,

REW

LDRER,

LDREW

REQ

DSA

FLGA,

FLGC

FLGB,

FLGD

tRSC

tRS

tRSS

MILITARY AND COMMERCIAL TEMPERATURE RANGES

tRSR

tRSF

tRSF

tRSR

Figure 9. Hardware Reset Timing

2668 drw 10

CSA

A0, A1

R/WA

DSA

taS

taH

Figure 10. Basic Port A Control Signal Timing (Applies to All Port A Timing)

2668 drw 11

5.32

18

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