HEF4511B Просмотр технического описания (PDF) - NXP Semiconductors.

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HEF4511B

BCD to 7-segment latch/decoder/driver

NXP Semiconductors. 

NXP Semiconductors

HEF4511B

BCD to 7-segment latch/decoder/driver

5. Pinning information

5.1 Pinning

HEF4511B

D1 1

D2 2

LT 3

BL 4

LE 5

D3 6

D0 7

VSS 8

Fig 4. Pin configuration DIP16 and SO16

16 VDD

15 Qf

14 Qg

13 Qa

12 Qb

11 Qc

10 Qd

9 Qe

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5.2 Pin description

Table 2. Pin description

Symbol

Pin

LT

3

BL

4

LE

5

D0 to D3

7, 1, 2, 6

VSS

Qa to Qg

8

13, 12, 11, 10, 9, 15, 14

VDD

16

Description

lamp test input (active LOW)

ripple blanking input (active LOW)

latch enable input (active HIGH)

address (data) input

ground supply voltage

segment output

supply voltage

HEF4511B

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 7 — 11 November 2011

© NXP B.V. 2011. All rights reserved.

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