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RMWB33001 Просмотр технического описания (PDF) - Fairchild Semiconductor

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Список матч
RMWB33001
Fairchild
Fairchild Semiconductor Fairchild
RMWB33001 Datasheet PDF : 6 Pages
1 2 3 4 5 6
Figure 2. Schematic of Application Circuit
Drain Supply
Vd =4 V
Bond Wires
10,000 pF
10,000 pF
100 pF
100 pF
100 pF
100 pF
Bond Wires
MMIC Chip
RF IN
RF OUT
Ground
(Back of Chip)
Bond Wires
100 pF
10,000 pF
3 k
Bond Wires
100 pF
Gate Supply Vg
Output Power
Detector Voltage Vdet
Note:
1: Detector delivers >0.1V DC into 3kload resistor for > +18dBm output power. If output power level detection is not desired, do not connect to detector bond pad.
Dimensions in mm
0.00
1.19
1.09
Figure 3. Chip Layout and Bond Pad Locations
0.82
1.34
1.83
2.58
3.19
1.19
1.09
0.725
0.57
0.415
0.725
0.57
0.415
0.10
0.10
0.00
0.00
0.00 0.10
0.60
2.85 3.09 3.19
Chip Size is 3.19mm x 1.19mm X 100µm. Back of chip is RF and DC Ground.
©2004 Fairchild Semiconductor Corporation
RMWB33001 Rev. C

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