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74HC4060-Q100 Просмотр технического описания (PDF) - NXP Semiconductors.

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Список матч
74HC4060-Q100
NXP
NXP Semiconductors. NXP
74HC4060-Q100 Datasheet PDF : 25 Pages
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Nexperia
74HC4060-Q100; 74HCT4060-Q100
14-stage binary ripple counter with oscillator
6. Pinning information
6.1 Pinning
+&4
+&74
4 
4 
4 
4 
4 
4 
4 
*1' 
 9&&
 4
 4
 4
 05
 56
 57&
 &7&
DDD
Fig 5. Pin configuration SO16 and (T)SSOP16
+&4
+&74
WHUPLQDO 
LQGH[ DUHD
4 
4 
4 
4 
4 
4 
9&& 
 4
 4
 4
 05
 56
 57&
DDD
7UDQVSDUHQW WRS YLHZ
(1) The die substrate is attached to this pad using
conductive die attach material. It cannot be used as
supply pin or input.
Fig 6. Pin configuration DHVQFN16
6.2 Pin description
Table 2. Pin description
Symbol
Pin
Q11 to Q13
1, 2, 3
Q3 to Q9
7, 5, 4, 6, 14, 13, 15
GND
8
CTC
9
RTC
10
RS
11
MR
12
VCC
16
Description
counter output
counter output
ground (0 V)
external capacitor connection
external resistor connection
clock input /oscillator pin
master reset input (active HIGH)
supply voltage
74HC_HCT4060_Q100
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 10 April 2013
© Nexperia B.V. 2017. All rights reserved
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