HI5828(1999) Просмотр технического описания (PDF) - Intersil

Номер в каталоге

Компоненты Описание

Список матч

HI5828
(Rev.:1999)

12-Bit, 125+MSPS, CommLink™ Dual High Speed CMOS D/A (2.7V-5.5V)

Intersil 

Timing Diagrams

HI5828

CLK

50%

D11-D0

IOUT

1/2 LSB ERROR BAND

tSETT

tPD

FIGURE 2. OUTPUT SETTLING TIME DIAGRAM

V

GLITCH AREA = 1/2 (H x W)

HEIGHT (H)

WIDTH (W)

t (ps)

FIGURE 3. PEAK GLITCH AREA (SINGLET) MEASUREMENT

METHOD

CLK

D11-D0

IOUT

tPW1

tPW2

tSU

tSU

tSU

tHLD

tHLD

tHLD

50%

tPD

tSETT

tPD

tSETT

tPD

tSETT

FIGURE 4. PROPAGATION DELAY, SETUP TIME, HOLD TIME AND MINIMUM PULSE WIDTH DIAGRAM

11

Share Link: