DS21T09 Просмотр технического описания (PDF) - Dallas Semiconductor -> Maxim Integrated
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DS21T09 Datasheet PDF : 10 Pages
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NOTES:
1. PDI , PDE , TCS
2. 4.00V < TERMPWR < 5.50V.
3. 0.0V < signal lines < TERMPWR.
4. All signal lines = 0.0V.
5. All signal lines open.
6. Power down enabled.
7. Guaranteed by design; not production tested.
DS21T09
8. C14 slightly higher capacitance due to
sensing circuitry.
9. Excluding PDI , PDE pins.
10. PDO output pin.
11. IBCST > 32 mA – disable termination.
12. Excluding PDE , PDI , R14, and TCS pins.
28–PIN SOIC (300-MIL)
The chamfer on the body is optional. If it is not
present, a terminal 1 identifier must be
positioned so that ½ or more of its area is
contained in the hatched zone.
PKG
DIM
A IN.
MM
A1 IN.
MM
A2 IN.
MM
b IN.
MM
C IN.
MM
D IN.
MM
e IN.
MM
E1 IN.
MM
H IN.
MM
L IN.
MM
Θ
28-PIN
MIN MAX
0.094 0.105
2.39
2.67
0.004
0.102
0.012
0.30
0.089
2.26
0.095
2.41
0.013 0.020
0.33
0.51
0.009 0.013
0.229
0.33
0.698 0.712
17.73 18.08
0.050 BSC
1.27 BSC
0.290
7.37
0.300
7.62
0.398
10.11
0.416
10.57
0.016 0.040
0.40
1.02
0°
8°
10 of 10
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